Method for forming an interlayer insulating film, and semiconductor device

ABSTRACT

A method for forming an interlayer insulating film is disclosed. This method comprises the steps of: forming an underlying insulating film on an object to be formed; and forming a porous SiO 2  film on said underlying insulating film by a Chemical Vapor Deposition that employs a source gas containing TEOS (tetraethoxy silane) and O 3  where the O 3  is contained in the source gas with first concentration that is lower than concentration necessary for oxidizing the TEOS. 
     Alternative method for forming an interlayer insulating film is also disclosed. This method comprises the step of: forming an underlying insulating film on an object to be formed; performing Cl (chlorine) plasma treatment for the underlying insulating film; and forming a porous SiO 2  film on the underlying insulating film by a Chemical Vapor Deposition that employs a source gas containing TEOS (tetraethoxy silane) and O 3 .

BACKGROUND OF THE INVENTION

The present invention relates to a method for forming an interlayer insulating film and, more particularly, to a method for forming an interlayer insulating film having a low dielectric constant, which is necessary for a highly-integrated semiconductor device. A progress in high integration regarding the semiconductor device in recent years has resulted in a narrower interval between wiring lines. As the narrowed interval between the wiring lines causes an increase in capacitance between the wiring lines, a request has been made for formation of an interlayer insulating film, which has a low dielectric constant.

With recent progresses in high integration of an LSI device, the wiring line has been micronized and multilayered. There has also been an increase in capacitance between the wiring lines. Such an increase in capacitance has caused a great reduction, in an operating speed. Thus, improvement in this regard has been strongly demanded. As one of improvement measures, a method for reducing capacitance between the wiring lines has been studied. This method uses an interlayer insulating film, which has a dielectric constant lower than that of SiO₂ currently used for an interlayer insulating film.

Typical interlayer insulating films of low dielectric constants currently under study are {circumflex over (1)} an SiOF film, and {circumflex over (2)} an organic insulating film of a low dielectric constant. Description will now be made of these films.

{circle around (1)} SiOF Film

An SiOF film is formed by using source gas containing F and substituting Si—F bond for a portion of Si—O bond in SiO₂. This SiOF film has a relative dielectric constant, which is monotonically reduced as concentration of F in the film increases.

For forming such SiOF films, several methods have been reported (see p.82 of monthly periodical “Semiconductor World”, February issue of 1996). Most promising among these methods is one for forming an SiOF film by using SiH₄, O₂, Ar and SiF₄ as source gases, and by a high-density plasma enhanced CVD method (HDPCVD method). A relative dielectric constant of an SiOF film formed by this method is in a range of 3.1 to 4.0 (varies depending on F concentration in the film). This value is lower than a relative dielectric constant 4.0 of SiO₂, which has conventionally been used for the interlayer insulating film.

{circle around (2)} Organic Insulating Film of Low Dielectric Constant

As an insulating film which has a lower dielectric constant (3.0 or lower) compared with the SiOF film, an organic insulating film of a low dielectric constant is now a focus of attention. Table 1 shows a few organic insulating films of low dielectric constants, which have been reported, and respective relative dielectric constants and thermal decomposition temperatures thereof.

TABLE 1 Relative Thermal Organic Dielectric Decomposition Insulating Film Constant Temperature (° C.) Note Fluorine- 2.4 420 p. 82 of monthly containing resin periodical “Semiconductor World”, February issue of 1997 Cytop 2.1 400 p. 90 of monthly periodical “Semiconductor World”, February issue of 1996 Amorphous telon 1.9 400 p. 91 of monthly periodical “Semiconductor World”, February issue of 1996

However, the SiOF film is disadvantageous in that an increase in concentration of F in the film leads to a reduction in moisture absorption resistance. The reduced moisture absorption resistance poses a serious problem, because a transistor characteristic and adhesion of an upper barrier metal layer are affected.

Peeling-off easily occurs in the organic insulating film of a low dielectric constant, because of bad adhesion with a silicon wafer or the SiO₂ film. Furthermore, the organic insulating film is disadvantageous in that heat resistivity is low since a thermal decomposition temperature is around 400° C. The disadvantage of low heat resistivity poses a problem for annealing a wafer at a high temperature.

SUMMARY OF THE INVENTION

It is an object of the present invention to provide a method for forming an interlayer insulating film of a low dielectric constant, which has good moisture absorption resistance and heat resistivity. It is another object of the invention to provide a semiconductor device, which employs the above method.

In accordance with the method of the invention for forming an interlayer insulating film, first, porous SiO₂ film is formed on an object to be formed. This porous SiO₂ film is formed by using a Chemical Vapor Deposition method which employs source gases containing TEOS (tetraethoxy silane) and O₃, where the concentration of the O₃ is lower than that necessary for oxidizing the TEOS. Accordingly, many voids are formed in the film. In other words, porosity is provided for the SiO₂ film formed in this manner.

Therefore, a dielectric constant of the porous SiO₂ film is smaller than that of a usual SiO₂ film having no porosity.

In addition, a SiO₂ film is formed on the porous SiO₂ film. This SiO₂ film is formed by a Chemical Vapor Deposition method which employs source gases containing TEOS and O₃ where the concentration of the O₃ is sufficient for oxidizing the TEOS. Accordingly, the SiO₂ film fore in this manner becomes a dense SiO₂ film that contains no CH and OH radicals.

Therefore, since the SiO₂ film formed on the porous SiO₂ film is dense, incursion of moisture into the porous SiO₂ film can be prevented, and an interlayer insulating film having good moisture resistance can be formed.

Furthermore, since these SiO₂ films consist mainly of Si and O, these films are expected to show better heat resistivity compared to the organic insulating films of the prior art.

Secondly, in accordance with the method of the present invention for forming an interlayer insulating film, Cl (chlorine) plasma treatment is performed for the object to be formed. Accordingly, Cl (chlorine) atoms are left on some portions of the surface of the object to be formed. Subsequently, an porous SiO₂ film is formed on the object to be formed by a Chemical Vapor Deposition method which contains TEOS and O₃ as source gases. At this time, the growth of the SiO₂ film is prevented on some portions of the surface on which the Cl (chlorine) atoms have been left. Accordingly, many voids are, formed in the SiO₂ film. In other words, porosity is provided for this SiO₂ film formed in this manner.

Therefore, a dielectric constant of the porous SiO₂ film is smaller than that of a usual SiO₂ film having no porosity.

Furthermore, since the porous SiO₂ film consists mainly of Si and O, heat resistivity of the film is expected to show better heat resistively compared to the organic insulating films of the prior art.

Thirdly, in accordance with the method of the present invention for forming an interlayer insulating film, a first insulating film is formed on the porous SiO₂ film, which has been formed on the object to be formed, the object having been subjected to the Cl (chlorine) plasma treatment. Then, after the first insulating film is etched to be planarized, a cover insulating film is formed thereon.

In other words, by the cover insulating film, incursion of moisture into the porous SiO₂ film can be prevented. Therefore, it is possible to form an interlayer insulating film, which has a planarized surface and good moisture absorption resistance and heat resistivity.

Furthermore, the method for forming the foregoing porous SiO₂ film can be applied to a damascene process. According to the damascene process, a Cu (copper) wiring layer having small electric resistance can be formed. By combining the Cu (copper) wiring layer with the foregoing porous SiO₂ film, it is possible to provide a semiconductor device where a parasitic capacitance of a wiring line is small, and a data processing speed is fast.

Fourthly, in accordance with the method of the present invention for forming an interlayer insulating film, after formation of the foregoing porous SiO₂ film, H (hydrogen) plasma treatment is performed. Accordingly, an Si—H bond is substituted for a dangling bond of Si in an Si—O bond in the surface of the void, and the surface of the void can be made stable.

Therefore, incursion of moisture from the surface of the void can be prevented, and it is possible to form an interlayer insulating film which has good moisture absorption resistance.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1A to 1G are cross-sectional views, each of which shows a method for forming an interlayer insulating film according to a first embodiment of the present invention;

FIGS. 2A to 2L are cross-sectional views, each of which shows a method for forming an interlayer insulating film according to a second embodiment of the invention;

FIGS. 3A to 3I are cross-sectional views, each of which shows a method for forming an interlayer insulating film according to a third embodiment of the invention; and

FIGS. 4A to 4N are cross-sectional views, each of which shows a method for forming an interlayer insulating film according to a fourth embodiment of the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Next, description will be made of the preferred embodiments of the present invention with reference to the accompanying drawings.

First Embodiment

FIGS. 1A to 1G are cross-sectional views, each of which illustrates a first embodiment of the present invention.

First, as shown in FIG. 1A, a BPSG (borophosphosilicate glass) film 102 is formed on a silicon substrate 101. Then, after an aluminum film is formed on the BPSG film 102, an aluminum Wring layer 103 is formed by patterning the aluminum film. The silicon substrate 101, the BPSG film 102 and the aluminum wiring layer 103 formed in this manner constitute an object 104 to be formed.

Then, as shown in FIG. 1B, an SiO₂ film 105 (underlying insulating film) is formed on the object 104 to be formed. This SiO₂ film 105 is formed by a plasma enhanced CVD method (plasma enhanced Chemical Vapor Deposition method), and SiH₄ and N₂O are used as source gases. A film thickness of this SiO₂ film 105 is 100 nm.

Subsequently, as shown in FIG. 1C, a porous SiO₂ film 106 is formed on the SiO₂ film 105 (underlying insulating film). This porous SiO₂ film 106 is formed by an atmospheric CVD method (atmospheric Chemical Vapor Deposition method). TEOS (tetraethoxy silane), O₃ of low concentration, and O₂ are contained in the source gas for the CVD method. Here, the O₃ of low concentration is defined as the O₃ having concentration that is lower than that necessary for oxidizing the TEOS. Specifically, the flow rate of the TEOS is 25 sccm and that of O₂ is 7.5 slm. And O₃ of 1-2% by flow rate ratio is contained in the O₂.

Furthermore, N₂ (nitrogen) with flow rate 1˜3 slm is also contained in the source gas. And the temperature of the silicon substrate 101 is maintained at 400° C. during the formation of SiO₂ film 106.

Generally, in the case of the atmospheric CVD method which uses TEOS and O₃ as source gases, the following has been discovered for an SiO₂ film thereby formed. That is, as concentration of O₃ in the source gas is increased, oxidation of TEOS progresses faster on a wafer to form an SiO₂ film having flowability. Conversely, as concentration of O₃ is decreased, oxidation of TEOS is insufficient. Accordingly, if concentration of O₃ is low, many CH or OH radicals are left in an SiO₂ film formed on the wafer. Especially, if an underlying film is an SiO₂ film, an abnormal growth of an SiO₂ film having a rough surface occurs by employing O₃ of low concentration and TEOS.

The porous SiO₂ film 106 is formed by utilizing the aforementioned abnormal growth of the SiO₂ film, and many voids are formed in the film.

Then, as shown in FIG. 1D, H (hydrogen) plasma treatment is performed for the porous SiO₂ film 106.

This H plasma treatment is performed by supplying H₂ of 600 sccm to a chamber (not shown) and applying RF power to upper and lower electrodes (not shown) that is opposing each other in the chamber. And the RF power applied to the upper electrode has frequency of 13.56 MHz and power of 50 W. On the other hand, the RF power applied to the lower electrode has frequency of 400 kHz and power of 400 W. Further, during undergoing the H plasma treatment, the pressure in the chamber is 0.1˜10.2 Torr and the temperature of the silicon substrate 101 is maintained at 400° C. Still further, the time for the H plasma treatment is 60 sec.

The H plasma treatment substitutes Si—H bonds for dangling bonds of Si in an Si—O bond in the surface of the void. Therefore, OH radicals and water are made to be hard to bond to the dangling bonds of Si, which improves the moisture absorption resistance of the film.

Then, as shown in FIG. 1E, an SiO₂ film 107 is formed on the porous SiO₂ film 106. This SiO₂ film 107 is formed by an atmospheric CVD method, for which the source gas containing O₂, O₃, and TEOS are used. At this time, a flow rate of TEOS is 25 sccm and that of O₂ is 7.5 slm. Further, O₂ contains O₃ of 5˜6% by flow rate ratio, which is sufficient for oxidizing the TEOS. Accordingly, as described above, the SiO₂ film 107 has flowability. Thus, even if the SiO₂ film 106 formed below has convexity and concavity in the surface, the SiO₂ film 107 is formed to have a nearly smooth surface shape, and self-planarizing is carried out.

Furthermore, N₂ (nitrogen) with flow rate 1˜3 is also contained in the source gas. And the temperature of the silicon substrate 101 is maintained at 400° C. during the formation of SiO₂ film 107.

Subsequently, as shown in FIG. 1F, the SiO₂ film 107 and the porous SiO₂ film 106 formed above a convexity 103 a of the aluminum wiring layer are polished to be planarized by a CMP method (Chemical Mechanical Polishing method). After completing the polishing, the SiO₂ film 105 (underlying insulating film) formed on the convexity 103 a of the aluminum wiring layer and the porous SiO₂ film 106 formed in a concavity 103 b of the same are exposed on the surfaces.

Then, as shown in FIG. 1G, an SiO₂ film 108 (cover insulating film) is formed on the SiO₂ film 105 (underlying insulating film) formed on the convexity 103 a of the aluminum wiring layer and on the porous SiO₂ film 106 formed in the concavity 103 b of the same. This SiO₂ film 108 is formed by the plasma enhanced CVD method. Sources gases used at this time are SiH₄ and N₂O, and a film thickness of the SiO₂ film 108 is 100 nm.

The foregoing process of forming the SiO₂ films 105 (underlying insulating film), 106 and 108 (cover insulating film) results in formation, on the object 104 to be formed, of an interlayer insulating film of a low dielectric constant, which has good heat resistivity and moisture absorption resistance. That is, the SiO₂ film 106 has porosity, a dielectric constant thereof is 2.0 to 3.0. This value is smaller than a dielectric constant 4.0 of a usual SiO₂ film. Also, since the usual SiO₂ film 108 is formed on the porous SiO₂ film 106, incursion of moisture into the SiO₂ film 106 can be prevented.

Further, the H plasma treatment for the SiO₂ film 106 can improve the moisture absorption resistance of the film 106.

Still further, the SiO₂ films 105, 106 and 108 have better heat resistivity compared to the organic insulating film of the prior art, because these films consist mainly of Si and O.

Second Embodiment

FIGS. 2A to 2L are cross-sectional views, each of which illustrates a second embodiment.

The second embodiment is a case of applying the first embodiment to a damascene process.

First, as shown in FIG. 2A, a BPSG (borophosphosilicate glass) film 202 is formed on a silicon substrate 201. After an aluminum layer is formed on the BPSG film 202, an aluminum wiring layer 203 is formed by patterning the aluminum layer. Then, the silicon substrate 201, the BPSG film 202 and the aluminum wiring layer 203 constitute an object 204 to be formed.

Subsequently, as shown in FIG. 2B, an SiO₂ film 205 (underlying insulating film) having a film thickness of 100 nm is formed on the aluminum wiring layer 203. This SiO₂ film 205 is formed by a plasma enhanced CVD method (plasma enhanced Chemical Vapor Deposition method), and SiH₄ and N₂O are used as source gases.

Then, as shown in FIG. 2C, an SiO₂ film 206 having a film thickness of 500 nm is formed on the SiO₂ film 205 (underlying insulating film). This SiO₂ film 206 is formed by an atmospheric CVD method (atmospheric Chemical Vapor Deposition method) for which the source gas containing O₂, O₃ of low concentration, and TEOS (tetraethoxy silane) are used.

Here, the O₃ of low concentration is defined as the O₃ having concentration that is lower than that necessary for oxidizing the TEOS. Specifically, the flow rate of the TEOS is 25 sccm and that of O₂ is 7.5 slm. And O₃ of 1-2% by flow rate ratio is contained in the O₂.

As described above in the first embodiment, since O₃ of low concentration is used, the SiO₂ film 206 is provided with porosity. Therefore, many voids are formed in the SiO₂ film 206.

It should be noted that N₂ (nitrogen) with flow rate 1˜3 slm is also contained in the source gas. And the temperature of the silicon substrate 201 is maintained at 400° C. during the formation of SiO₂ film 206.

Subsequently, as shown in FIG. 2D, H (hydrogen) plasma treatment is performed for the SiO₂ film 206. The process condition for the H plasma treatment is the same as explained in the first embodiment. Namely, it is performed by supplying H₂ of 600 sccm to a chamber (not shown) and applying RF power to upper and lower electrodes (not shown) that is opposing each other in the chamber. And the RF power applied to the upper electrode has frequency of 13.56 MHz and power of 50 W. On the other hand, the RF power applied to the lower electrode has frequency of 400 kHz and power of 400 W. Further, during undergoing the H plasma treatment, the pressure in the chamber is 0.1˜0.2 Torr and the temperature of the silicon substrate 201 is maintained at 400° C. Still further, the time for the H plasma treatment is 60 sec.

The H plasma treatment substitutes Si—H bonds for dangling bonds of Si in an Si—O bond in the surface of the void. Therefore, OH radicals and water are made to be hard to bond to the dangling bonds of Si, which improves the moisture absorption resistance of the film.

Subsequently, as shown in FIG. 2E, patterning is performed for the SiO₂ film 205 and 206 to form a damascene trench 207. This damascene trench 207 reaches the aluminum wiring layer 203 formed below the SiO₂ film 206.

Then, as shown in FIG. 2F, an SiO₂ film 208 (second insulating film) is formed on the SiO₂ film 206 and on the side and bottom portions of the damascene trench 207. This SiO₂ film 208 is formed by a plasma enhanced CVD method, and SiH₄ and N₂O are used as source gases. By the SiO₂ film 208 formed on the side portion of the damascene trench 207, Cu buried later in the damascene trench 207 can be prevented from being dispersed inside the porous SiO₂ film 206.

Then, as is shown in FIG. 2G, anisotropic etching is performed for the SiO₂ film 208 (second insulating film). While this etching eliminates the SiO₂ film 208 formed on the bottom portion of the damascene trench 207, the SiO₂ film 208 formed on the side portion of the damascene trench 207 is not eliminated in this etching. The remaining SiO₂ film 208 constitutes a sidewall insulating film on the side portion of the damascene trench 207.

Subsequently, as shown in FIG. 2H, a Cu (copper)-plated film 209 is formed in the damascene trench 207 and on the SiO₂ film 206. The Cu-plated film 209 formed in the damascene trench 207 is used as a Cu wiring line.

Then, as shown in FIG. 2I, the Cu-plated film 209 formed on the SiO₂ film 206 is polished and eliminated by a CMP method (Chemical Mechanical Polishing method). Accordingly, the Cu-plated film remains only in the damascene trench 207.

Subsequently, as shown in FIG. 2J, a barrier metal TiN film 210 is formed above the damascene trench 207. Accordingly, Cu in the damascene trench 207 can be prevented from being dispersed in an SiO₂ film formed later above the damascene trench 207.

Then, as shown in FIG. 2K, patterning is performed to leave a TiN film 210 a formed above the damascene trench 207, and the TiN film 210 formed in the other portions is etched to be eliminated.

Subsequently, as shown in FIG. 2L, an SiO₂ film 211 (cover insulating film) is formed on the SiO₂ film 206 and the TiN film 210 a. This SiO₂ film 211 is formed by a plasma enhanced CVD method, and SiH₄ and N₂O are used as source gases.

The foregoing process results in formation, on the object 204 to be formed, of an interlayer insulating film of a low dielectric constant, which has good heat resistivity and moisture absorption resistance. That is, the SiO₂ film 206 has porosity, and a dielectric constant thereof is 2.0 to 3.0. This value is smiler than a dielectric constant 4.0 of a usual SiO₂ film. Also, since the usual SiO₂ film 211 (cover insulating film) is formed on the porous SiO₂ film 206, incursion of moisture into the SiO₂ film 206 can be prevented.

Further, the H plasma treatment for the SiO₂ film 206 can improve the moisture absorption resistance of the film 206.

Still further, the, SiO₂ films 206 and 211 have better heat resistivity compared to the organic insulating film of the prior art, because these films consist mainly of Si and O.

Third Embodiment

FIGS. 3A to 3I are cross-sectional views, each of which illustrates a third embodiment.

First, as shown in FIG. 3A, a BPSG (borophosphosilicate glass) film 302 is formed on a silicon substrate 301. Then, after an aluminum film is formed on the BPSG film 302, patterning is performed for the same to form an aluminum wiring layer 303. The silicon substrate 301, the BPSG film 302 and the aluminum wiring layer 303 formed in this manner constitute an object 304 to be formed.

Then, as shown in FIG. 3B, an SiO₂ film 305 (underlying insulating film) is formed on the object 304 to be formed. This SiO₂ film 305 is formed by a plasma enhanced CVD method (plasma enhanced Chemical Vapor Deposition method), and SiH₄ and N₂O are used as source gases. A film thickness of the SiO₂ film 305 is 100 nm.

Subsequently, as shown in FIG. 3C, Cl (chlorine) plasma treatment is performed for the SiO₂ film 305 (underlying insulating film).

This Cl plasma treatment is performed by supplying Cl₂ of 600 sccm to a chamber (not shown) and applying RF power to upper and lower electrodes (not shown) that is opposing each other in the chamber. And the RF power applied to the upper electrode has frequency of 13.56 MHz and power of 100 W. On the other hand, the RF power applied to the lower electrode has frequency of 400 kHz and power of 400 W. During undergoing the Cl plasma treatment the pressure in the chamber is about 0.2 Torr and the temperature of the silicon substrate 301 is maintained at 400° C.

This Cl plasma treatment leaves Cl (chlorine) atoms on some portions of the surface of the SiO₂ film 305.

Then, as shown in FIG. 3D, an SiO₂ film 306 having a film thickness of 500 nm is formed on the SiO₂ film 305 (underlying insulating film) which has been subjected to the Cl (chlorine) plasma treatment. This SiO₂ film 306 is formed by an atmospheric CVD method (atmospheric Chemical Vapor Deposition method) for which the source gas containing O₂, O₃, and TEOS (tetraethoxy silane) are used. The flow rate of the TEOS is 25 sccm and that of O₂ is 7.5 slm. And O₃ of 4-6% by flow rate ratio is contained in the O₂. Further, the source gas contains N₂ (nitrogen) of flow rate 1-3 slm. Still further, during the formation of the SiO₂ film 306 the temperature of the silicon substrate 301 is maintained at 400° C.

At this time, the SiO₂ film 306 is prevented from being grown on the portion of the surface of the SiO₂ film 305 where Cl (chlorine) has been left. Accordingly, many voids are formed in the SiO₂ film 306 to provide porosity for the same.

Subsequently, as shown in FIG. 3E, H (hydrogen) plasma treatment is performed for the porous SiO₂ film 306.

The process condition for the H plasma treatment is the same as explained in the first and second embodiment. Namely, it is performed by supplying H₂ of 600 sccm to a chamber (not shown) and applying RF power to upper and lower electrodes (not shown) that is opposing each other in the chamber. And the RF power applied to the upper electrode has frequency of 13.56 MHz and, power of 50 W. On the other hand, the RF power applied to the lower electrode has frequency of 400 kHz and power of 400 W. Further, during undergoing the H plasma treatment, the pressure in the chamber is 0.1˜0.2 Torr and the temperature of the silicon substrate 301 is maintained at 400° C. Still further, the time for the H plasma treatment is 60 sec.

The H plasma treatment substitutes Si—H bonds for dangling bonds of Si in an Si—O bond in the surface of the void. Therefore, OH radicals and water are made to be hard to bond to the dangling bonds of Si, which improves the moisture absorption resistance of the film.

Subsequently, as shown in FIG. 3F, an SiO₂ film 307 is formed on the porous SiO₂ film 306. This SiO₂ film 307 is formed by a plasma enhanced CVD method.

Then, as shown in FIG. 3G, an SiO₂ film 308 (first insulating film) having a film thickness of 200 nm is formed on the SiO₂ film 307. This SiO₂ film 308 is formed by an atmospheric CVD method, for which the source gas containing O₂, O₃, and TEOS are used. Since the concentration of O₃ in the source gas at this time is higher than usual, flowability is provided for the SiO₂ film 308. Accordingly, even if the surface of the SiO₂ film 307 formed below has convexity and concavity, the SiO₂ film 308 is formed to have a nearly planarized surface, and self-planarizing is carried out.

In this case, by the previously formed SiO₂ film 307, the SiO₂ film 308 having flowability can be prevented from entering the void of the porous SiO₂ film 306.

Subsequently, as shown in FIG. 3H, in order for planarizing the surface, etching is performed for the SiO₂ films 307 and 308 (first insulating film). This etching should be carried out not to result in complete elimination of the SiO₂ film 308.

Then, as shown in FIG. 3I, an SiO₂ film 309 (cover insulating film) is formed on the remaining SiO₂ films 307 and 308 (first insulating film), i.e., the portions of the films remaining without being eliminated by etching. This SiO₂ film 309 is formed by a plasma enhanced CVD method, and a film thickness thereof is 100 nm.

The foregoing process of forming the SiO₂ films 305 (underlying insulating film), 306, 307, 308 (first insulating film) and 309 (cover insulating film) results in formation, on the object 304 to be formed, an interlayer insulating film of a low dielectric constant, which has good heat resistivity and moisture absorption resistance. That is, the SiO₂ film 306 has porosity, and a dielectric constant thereof is 2.0 to 3.0. This value is smaller than a dielectric constant 4.0 of a usual SiO₂ film.

Further, the H plasma treatment for the SiO₂ film 306 can improve the moisture absorption resistance of the film 306.

Also, since the usual SiO₂ films 307, 308 and 309 are formed on the porous SiO₂ film 306, incursion of moisture into the SiO₂ film 306 can be prevented.

Moreover, the SiO₂ films 305, 306, 307, 308, and 309 have better heat resistivity compared to the organic insulating film of the prior art, because these films consist mainly of Si and O.

Fourth Embodiment

A fourth embodiment is a case of applying the third embodiment to a damascene process.

FIGS. 4A to 4N are cross-sectional views, each of which illustrates the fourth embodiment.

First, as shown in FIG. 4A, a BPSG (borophosphosilicate glass) film 402 is formed on a silicon substrate 401. Then, after an aluminum layer is formed on the BPSG film 402, patterning is performed for the aluminum layer to form an aluminum wiring layer 403. The silicon substrate 401, the BPSG film 402 and the aluminum wiring layer 403 constitute an, object 404 to be formed.

Subsequently, as shown in FIG. 4B, an SiO₂ film 405 (underlying insulating film) having a film thickness of 100 nm is formed on the aluminum wiring layer 403. This SiO₂ film 405 is formed by a plasma enhanced CVD method (plasma enhanced Chemical Vapor Deposition method), and SiH₄ and N₂O are used as source gases.

Then, as shown in FIG. 4C, Cl (chlorine) plasma treatment is performed for the SiO₂ film 405 (underlying insulating film).

This Cl plasma treatment is performed by supplying Cl₂ of 600 sccm to a chamber (not shown) and applying RF power to upper and lower electrodes (not shown) that is opposing each other in the chamber. And the RF power applied to the upper electrode has frequency of 13.56 MHz and power of 100 W. On the other hand, the RF power applied to the lower electrode has frequency of 400 kHz and power of 400 W. During undergoing the cl plasma treatment the pressure in the chamber is about 0.2 Torr and the temperature of the silicon substrate 401 is maintained at 400° C.

This Cl plasma treatment leaves Cl (chlorine) atoms on some portions of the surface of the SiO₂ film 405.

Then, as shown in FIG. 4D, an SiO₂ film 406 having a film thickness of 500 nm is formed on the SiO₂ film 405 (underlying insulating film) which has been subjected to the Cl (chlorine) plasma treatment. This SiO₂ film 406 is formed by an atmospheric CVD method (atmospheric Chemical Vapor Deposition method), for which the source gas containing O₂, O₃, and TEOS (tetraethoxy silane) are used. The flow rate of the TEOS is 25 sccm and that of O₂ is 7.5 slm. And O₃ of 4-6% by flow rate ratio is contained in the O₂. Further, the source gas contains N₂ (nitrogen) of flow rate 1-3 slm. Still further, during the formation of the SiO₂ film 406 the temperature of the silicon substrate 401 is maintained at 400° C.

At this time, the SiO₂ film 406 is prevented from being grow on the portions of the surface of the SiO₂ film 405 where Cl (chlorine) has been left. Accordingly, many voids are formed in the SiO₂ film 406, and porosity is provided for the SiO₂ film 406.

Then, as shown in FIG. 4E, H (hydrogen) plasma treatment is performed for the porous SiO₂ film 406.

The process condition for the H plasma treatment is the same as explained in the first to third embodiment. Namely, it is performed by supplying H₂ of 600 sccm to a chamber (not shown) and applying RF power to upper and lower electrodes (not shown) that is opposing each other in the chamber. And the RF power applied to the upper electrode has frequency of 13.56 MHz and power of 50 W. On the other hand, the RF power applied to the lower electrode has frequency of 400 kHz and power of 400 W. Further, during undergoing the H plasma treatment, the pressure in the chamber is 0.1˜0.2 Torr and the temperature of the silicon substrate 401 is maintained at 400° C. Still further, the time for the H plasma treatment is 60 sec.

The H plasma treatment substitutes Si—H bonds for dangling bonds of Si in an Si—O bond in the surface of the void. Therefore, OH radicals and water are made to be hard to bond to the dangling bonds of Si, which improves the moisture absorption resistance of the film.

Then, as shown in FIG. 4F, an SiO₂ film 407 is formed on the SiO₂ film 406. This SiO₂ film 407 is formed by a plasma enhanced CVD method, and SiH₄ and N₂O are used as source gases. By this SiO₂ film 407, Cu of a Cu-plated film formed later on the SiO₂ film 407 can be prevented from being dispersed in the porous SiO₂ film 406.

Subsequently, as shown in FIG. 4G, patterning is performed for the SiO₂ films 405 (underlying insulating film), 406 and 407 to form a damascene trench 408. This damascene trench 408 reaches the aluminum wiring layer 403 formed below the SiO₂ film 405.

Then, as shown in FIG. 4H, an SiO₂ film 409 (second insulating film) is formed on the SiO₂ film 407 and on the side and bottom portions of the damascene trench 408. This SiO₂ film 409 is formed by a plasma enhanced CVD method. By the SiO₂ film 409 formed on the side portion of the damascene trench 408, Cu buried later in the damascene trench 408 can be prevented from being dispersed in the porous SiO₂ film 406.

Then, as shown in FIG. 4I, anisotropic etching is performed for the SiO₂ film 409 (second insulating film). Accordingly, the SiO₂ film 409 is eliminated except for the portion formed on the side portion of the damascene trench 408, and a contact hole reaching the aluminum wiring layer 403 is formed in the lower portion of the damascene trench 408. And the SiO₂ film 409 remaining on the side portion of the damascene trench 408 constitutes a sidewall insulating film. The SiO₂ film 407 is not eliminated by this etching and is left on the porous SiO₂ film 406.

Subsequently, as shown in FIG. 4J, a Cu-plated film 410 is formed in the damascene trench 408 and on the SiO₂ film 407. The Cu-plated film 410 formed in the damascene trench 408 is used as a Cu wiring line.

Then, as shown in FIG. 4K, the Cu-plated film 410 formed on the SiO₂ film 407 is polished and eliminated by a CMP method. Accordingly, the Cu-plated film 410 remains only in the damascene trench 408.

Subsequently, as shown in FIG. 4L, a barrier metal TiN film 411 is formed above the damascene trench 408. Accordingly, Cu in the damascene trench 408 can be prevented from being dispersed in an SiO₂ film later formed above the same.

Then, as shown in FIG. 4M, patterning is performed to leave a TiN film 411 a formed above the damascene trench 408, and the TiN film 411 formed in the other portions is etched to be eliminated.

Subsequently, as shown in FIG. 4N, an SiO₂ film 412 (cover insulating film) is formed on the SiO₂ film 407 and the TiN film 411 a. This SiO₂ film 412 is formed by a plasma enhanced CVD method, and SiH₄ and N₂O are used as source gases.

The foregoing process results in formation, on the object 404 to be formed, an interlayer insulating film of a low dielectric constant, which has good heat resistivity and moisture absorption resistance. That is, the SiO₂ film 406 has porosity, and a dielectric constant thereof is 2.0 to 3.0. This value is smaller than a dielectric constant 4.0 of a usual SiO₂ film.

Further, the H plasma treatment for the SiO₂ film 406 can improve the moisture absorption resistance of the film 406.

Also, since the usual SiO₂ films 407 and 412 (cover insulating film) are formed on the porous SiO₂ film 406, incursion of moisture into the SiO₂ film 406 can be prevented.

Moreover, the SiO₂ films 406, 407, and 412 have better heat resistivity compared to the organic insulating film of the prior art, because these films consist mainly of Si and O. 

What is claimed is:
 1. A method for forming an interlayer insulating film in a semiconductor device, comprising the steps of: forming a porous SiO₂ film on a substrate by a Chemical Vapor Deposition that employs a source gas containing TEOS and O₃, wherein the O₃ is contained in the source gas in a first concentration that is lower than a second concentration necessary for oxidizing the TEOS; and forming a dense insulating film over said porous SiO₂ film.
 2. A method for forming an interlayer insulating film in a semiconductor device, comprising the steps of: forming an underlying insulating film on a substrate; forming a porous SiO₂ film on said underlying insulating film by Chemical Vapor Deposition that employs a source gas containing TEOS and O₃, wherein the O₃ is contained in the source gas in a first concentration that is lower than a second concentration necessary for oxidizing the TEOS; and forming a dense insulating film over said porous SiO₂ film.
 3. A method for forming an interlayer insulating film according to claim 1, wherein said dense insulating film is a SiO₂ film which is formed on said porous film by a Chemical Vapor Deposition that employs a source gas containing TEOS and O₃, wherein the O₃ is contained in the source gas in said second concentration that is sufficient for oxidizing the TEOS.
 4. A method according to claim 3, wherein after formation of said SiO₂ film on said porous SiO₂ film, a surface of said SiO₂ film is polished to be planarized by a CMP method (Chemical Polishing method).
 5. A method according to claim 4, wherein after the surface is polished to be planarized by the CMP method (Chemical Mechanical Polishing Method), said dense insulating film is formed on said surface.
 6. A method for forming an interlayer insulating film, comprising the steps of: contacting a substrate with a Cl (chlorine) plasma; and forming a porous SiO₂ film on said surface by a Chemical Vapor deposition that employs a source gas containing TEOS (tetraethoxy silane) and O₃.
 7. A method for forming an interlayer insulating film, comprising the steps of: forming an underlying insulating film on a substrate; contacting said underlying insulating film with a chlorine plasma; and forming a porous SiO₂ film on said underlying insulating film by a Chemical Vapor Deposition that employs a source gas containing TEOS (tetraethoxy silane) and O₃.
 8. A method according to claim 6, further comprising the step of: after formation of said porous SiO₂ film, forming a first insulating film on the porous SiO₂ film by a Chemical Vapor deposition that employs source gas containing TEOS (tetraethoxy silane) and O₃; and etching a surface of said first insulating film so as to planarize said surface.
 9. A method according to claim 8, wherein after planarizing said surface of said first insulating film, a cover insulating film is formed on said first insulating film.
 10. A method for forming an interlayer insulating, film, comprising the steps of: forming a porous SiO₂ film on a substrate by a Chemical Vapor Deposition that employs a source gas containing TEOS (tetraethoxy silane) and O₃, wherein the O₃ is contained in the source gas at a first concentration that is lower than a second concentration necessary for oxidizing the TEOS; forming a damascene trench in said porous SiO₂ film wherein the damascene trench reaches said substrate; forming a side wall insulating film on a side portion of said damascene trench; burying a metallic film in said damascene trench; and forming a barrier metal film on said metallic film.
 11. A method for forming an interlayer insulating film, comprising the steps of: forming an underlying insulating film on a substrate; forming a porous SiO₂ film on said underlying insulating film by a Chemical Vapor Deposition that employs a source gas containing TEOS (tetraethoxy silane) and O₃ wherein the O₃ is contained in the source gas in a first concentration that is lower than a second concentration necessary for oxidizing the TEOS; forming a damascene trench in said underlying insulating film and said porous SiO₂ film wherein the damascene trench reaches said substrate; forming a side wall insulating film on a side portion of said damascene trench; burying a metallic film in said damascene trench; and forming a barrier metal film on said metallic film.
 12. A method for forming an interlayer insulating film, comprising the steps of: contacting a substrate with a Cl (chlorine) plasma; forming a porous SiO₂ film on said substrate by a Chemical Vapor Deposition that employs a source gas containing TEOS (tetraethoxy silane) and O₃; forming a damascene trench in said porous SiO₂ film wherein the damascene trench reaches said substrate; forming a side wall insulating film on a side portion of said damascene trench; burying a metallic film in said damascene trench; and forming a barrier metal film on said metallic film.
 13. A method for forming an interlayer insulating film, comprising the steps of: forming an underlying insulating film on a substrate; contacting said underlying insulating film with a Cl (chlorine) plasma; forming a porous SiO₂ film on said underlying insulating film by a Chemical Vapor Deposition that employs a source gas containing TEOS (tetraethoxy silane) and O₃; forming a damascene trench in said underlying insulating film and said porous SiO₂ film to reach said substrate; forming a side wall insulating film in a side portion of said damascene trench; burying a metallic film in said damascene trench; and forming a barrier metal film on said metallic film.
 14. A method according to claim 10, wherein said side wall insulating film is formed by forming a second insulating film on said porous SiO₂ film and on side and bottom portions of said damascene trench after formation of said damascene trench, and performing anisotropic etching for said second insulating film to leave a portion of the same formed on the side portion of said damascene trench and exposing a surface of said substrate in the lower portion of said damascene trench.
 15. A method according to claim 10, wherein after formation of said barrier metal film, a cover insulating film is formed on said porous SiO₂ film and said barrier metal film.
 16. A method according to claim 1, wherein after formation of said porous SiO₂ film, H (hydrogen) plasma treatment is performed for the s SiO₂ film.
 17. A method for forming an interlayer insulating film according to claim 2, wherein said dense insulating film is a SiO₂ film which is formed on said porous film by a Chemical Vapor Deposition that employs a source gas containing TEOS and O₃, wherein the O₃ is contained in the source gas in said second concentration that is sufficient for oxidizing the TEOS.
 18. A method for forming an interlayer insulating film according to claim 1, wherein said porous SiO₂ film has a dielectric constant of 2.0 to 3.0 and wherein said dense insulating film is an SiO₂ film has a dielectric constant of 4.0.
 19. A method for forming an interlayer insulating film according to claim 2, wherein said porous SiO₂ film has a dielectric constant of 2.0 to 3.0 and wherein said dense insulating film is an SiO₂ film has a dielectric constant of 4.0. 